In modern computer systems, system addresses must be mapped to physical memory addresses so that the system can access the memory. Generally, system addresses are linear while, for example, synchronous dynamic random access memory (SDRAM) addresses are three-dimensional. Various modes map a system address to an SDRAM device's physical memory address; these modes include row-bank-column and bank-row-column. Each mode has its own advantages and disadvantages. For example, mappings calculated according to row-bank-column may be useful for applications that need to cross page boundaries (e.g., video decoding), while mappings calculated according to bank-row-column may be most effective for applications that generally do not need to cross page boundaries (e.g., a general-purpose processor making short accesses of the memory). In current SDRAM-based systems, only one mode can be supported in a single SDRAM device at any one time.
Therefore, it may be desirable to provide a system and method that flexibly can access a single physical memory device according to at least two memory mapping modes simultaneously.